Semiconductor apparatus, memory system and repair method thereof
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United States of America Patent
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Feb 5, 2019
Grant Date -
Jan 11, 2018
app pub date -
Jan 26, 2017
filing date -
Jul 5, 2016
priority date (Note) -
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Abstract
A semiconductor apparatus may include a fuse cell array, an address generation circuit, a control circuit, and a command generation circuit. The fuse cell array may store a fail address. The address generation circuit may generate a copy address according to test information containing the fail address. The control circuit may control a repair operation including enabling a copy start signal according to the test information and storing the fail address in the fuse cell array according to a copy done signal. The command generation circuit may generate an address and a plurality of commands for a data copy operation according to the copy start signal and enable the copy done signal when the data copy operation is completed.
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