Interconnect wake response circuit and method
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United States of America Patent
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Aug 7, 2018
Grant Date -
Jan 11, 2018
app pub date -
Dec 8, 2014
filing date -
Dec 8, 2014
priority date (Note) -
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Abstract
In some embodiments, provided are circuits and approaches for responding to wake requests over a data bus such as with a USB interface. An interconnect PHY may be placed into an aggressive power reduction mode and in response to a detected wake request on the bus, respond in a sufficient time by keeping at least a portion of a transmitter data path in the PHY powered on during the reduced power mode and responding to the wake request while the PHY re-boots in the background.
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