Circuit and method for adjusting select gate voltage of non-volatile memory during erasure of memory cells based on a well voltage

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United States of America Patent

PATENT NO 10325662
APP PUB NO 20180005699A1
SERIAL NO

15705001

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Abstract

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A circuit for adjusting a select gate voltage of a non-volatile memory is provided. The circuit includes a well, a select gate, and an adjustment unit. There is a capacitive coupling between the well and the select gate. The adjustment unit generates a driving voltage for the select gate based on a non-constant voltage.

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Patent Owner(s)

Patent OwnerAddress
MACRONIX INTERNATIONAL CO LTDNO 16 LI-HSIN RD SCIENCE-BASED INDUSTRIAL PARK HSINCHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Wei-Jen Hsinchu, TW 158 903
Hung, Shuo-Nan Hsinchu, TW 60 299
Shen, Shin-Jang Hsinchu, TW 25 309

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