Method and Apparatus for Collecting Signal Values in FPGA Based Emulation Machine
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
N/A
app pub date -
May 16, 2017
filing date -
May 27, 2016
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
Systems and methods for collecting signal values in FPGA based emulation machine. A single LUT is used to observe three observable points within a VLSI. A 6-input LUT is used to implement scan cells. Each scan cell implements a 4:1 multiplexer using the 6-input LUT. Each scan cell also uses three registers. The first and second register are used to sample and hold signals from the first two of the three observable points associated with that scan cell. The third register is used to capture the output of the 4:1 multiplexer.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully