Methods and apparatus for smart memory interface
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United States of America Patent
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Jun 5, 2018
Issued Date -
Dec 28, 2017
app pub date -
Jun 27, 2016
filing date -
Jun 27, 2016
priority date (Note) -
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Abstract
One embodiment relates to a memory structure that includes a bank group and a port emulation circuit module. The bank group includes a plurality of memory banks, each memory bank having one read port and one write port. The port emulation circuit module provides a group read/write port and a group read port for the bank group. Another embodiment relates to a port emulation circuit module. The port emulation circuit module includes a port emulation control circuit that receives control signals including a first address for a group read/write port and a second address for a group read port, a first data path circuit for the group read/write port, and a second data path circuit for the group read port, wherein the second data path circuit outputs a second read data. Other embodiments and features are also disclosed.
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