Three-dimensional semiconductor device
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United States of America Patent
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Oct 16, 2018
Grant Date -
Dec 7, 2017
app pub date -
Oct 11, 2016
filing date -
Jun 6, 2016
priority date (Note) -
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Abstract
A 3D semiconductor device is provided, including several memory layers vertically stacked on a substrate, an upper selection layer formed on the memory layers, a lower selection layer formed above the substrate, several strings formed vertically to the memory layers and the substrate, several bit lines parallel to each other and disposed above the substrate. The memory layers are parallel to each other, and the strings are electrically connected to the upper selection layer and the lower selection layer. The bit lines are positioned under the memory layers.
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