METHOD AND SYSTEM FOR ASYNCHRONOUS SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTOR (ADC) ARCHITECTURE
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United States of America Patent
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app pub date -
Aug 11, 2017
filing date -
Jul 18, 2012
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Abandoned
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Abstract
A system for processing signals may be configured to detect occurrence of particular errors, comprising meta-stability events, during digital conversion to analog signals, and to handle any detected meta-stability event, such as by adjusting at least a portion of a corresponding digital output based on detection of the meta-stability event. The adjusting of the digital output may comprise setting at least the portion of the digital output, such as to one of a plurality of predefined digital values or patterns. The system may comprise a code generator for generating and/or outputting the predefined digital values or patterns. The system may comprise a selector for adaptively selecting, for portions of the digital output, between output of normal processing path and between predefined values or patterns.
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