COMPUTE UNIT INCLUDING THREAD DISPATCHER AND EVENT REGISTER AND METHOD OF OPERATING SAME TO ENABLE COMMUNICATION
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United States of America Patent
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May 18, 2016
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May 18, 2016
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Abstract
An apparatus includes a set of one or more processing cores, a thread dispatcher, and an event register of a first compute unit. The set of one or more processing cores is configured to execute a set of threads. The thread dispatcher is coupled to the set of one or more processing cores and is configured to select threads of the set of threads for execution by the set of one or more processing cores. The thread dispatcher is further configured to refrain from selecting a first thread of the set of threads for execution in response to a first value of one or more bits of the event register and to select the first thread for execution in response to a second value of the one or more bits.
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