Fault buffer for resolving page faults in unified virtual memory system

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 10445243
APP PUB NO 20140281256A1
SERIAL NO

14055356

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Abstract

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A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault upon determining that a first page table that is stored in a first memory unit associated with the first processing unit does not include a mapping corresponding to the first virtual memory address. The system further includes a first copy engine associated with the first processing unit. The first copy engine is configured to read a first command queue to determine a first mapping that corresponds to the first virtual memory address and is included in a first page state directory. The first copy engine is also configured to update the first page table to include the first mapping.

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Patent Owner(s)

Patent OwnerAddress
NVIDIA CORPORATION2701 SAN TOMAS EXPRESSWAY SANTA CLARA CA 95050

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Buschardt, Cameron Round Rock, US 29 359
Cheung, Sherry San Jose, US 7 40
Deming, James Leroy Madison, US 39 506
Duluk,, Jr Jerome F Palo Alto, US 112 1145
Duncan, Samuel H Arlington, US 45 581
Dunning, Lucien Santa Clara, US 26 252
George, Robert Austin, US 46 1751
Gopalakrishnan, Arvind San Jose, US 9 62
Hairgrove, Mark San Jose, US 41 397
Jia, Chenghuan Fremont, US 17 118
Mashey, John Portola Valley, US 23 302

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