Maximizing cubic phase group III-nitride on patterned silicon
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United States of America Patent
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N/A
Issued Date -
N/A
app pub date -
Apr 18, 2017
filing date -
Apr 21, 2016
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A device including a non-polarization material includes a number of layers. A first layer of silicon (100) defines a U-shaped groove having a bottom portion (100) and silicon sidewalls (111) at an angle to the bottom portion (100). A second layer of a patterned dielectric on top of the silicon (100) defines vertical sidewalls of the U-shaped groove. A third layer of a buffer covers the first layer and the second layer. A fourth layer of gallium nitride is deposited on the buffer within the U-shaped groove, the fourth layer including cubic gallium nitride (c-GaN) formed at merged growth fronts of hexagonal gallium nitride (h-GaN) that extend from the silicon sidewalls (111), wherein a deposition thickness (h) of the gallium nitride above the first layer of silicon (100) is such that the c-GaN completely covers the h-GaN between the vertical sidewalls.
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International Classification(s)
- 2017 Application Filing Year
- H01L Class
- 30754 Applications Filed
- 25260 Patents Issued To-Date
- 82.14 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 4 Citation Count
- H01L Class
- 23.71 % this patent is cited more than
- 7 Age
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