DC offset cancellation circuit
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jan 2, 2018
Issued Date -
N/A
app pub date -
Apr 14, 2017
filing date -
Apr 15, 2016
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Disclosed herein is a DC offset cancellation circuit. The DC offset cancellation circuit includes a DC feedback unit configured to vary a DC feedback (DCFB) bandwidth to add at least one mid-bandwidth to the DCFB bandwidth and to provide a delay time in each case in order to reduce the DC droop error that occurs in switching from the high bandwidth (BW) to the mid-BW or from the mid-BW mode to the low BW mode, such that stable settling is ensured.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully