INTEGRATION OF NOMINAL GATE WIDTH FINFETS AND DEVICES HAVING LARGER GATE WIDTH
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United States of America Patent
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Issued Date -
Oct 12, 2017
app pub date -
Apr 7, 2016
filing date -
Apr 7, 2016
priority date (Note) -
Abandoned
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Abstract
A starting semiconductor structure includes a layer of filler material (e.g., amorphous silicon), a hard mask layer over the layer of filler material, and filler material lines over the hard mask layer. A protective layer is formed over one or more, but less than all of the filler material lines, at least one protected filler material line and at least one unprotected filler material line have a same width, and, after forming the protective layer, oxidizing unprotected filler material lines, such that the oxidized unprotected line(s) have a larger width than the protected filler material line(s).
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