Semiconductor integrated circuit having different operation modes and design method thereof
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United States of America Patent
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Jun 25, 2019
Grant Date -
Oct 12, 2017
app pub date -
Mar 3, 2017
filing date -
Apr 12, 2016
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Abstract
A semiconductor integrated circuit includes a bus signal line and a test signal line arranged adjacent to the bus signal line. The semiconductor integrated circuit has a system mode, which is an operation mode that uses the bus signal line, and a scan mode, which is an operation mode that uses the test signal line. The semiconductor integrated circuit fixes the logic level of the test signal line adjacent to the bus signal line in the system mode that uses the bus signal line. The semiconductor integrated circuit fixes the logic level of the bus signal line adjacent to the test signal line in the scan mode that uses the test signal line.
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