Single-Chip High Speed and High Voltage Level Shifter
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United States of America Patent
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Mar 25, 2016
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Mar 25, 2016
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Abstract
A semiconductor device includes a low voltage region, a high voltage region monolithically integrated with the low voltage region in a semiconductor substrate, where the low voltage region is electrically coupled to the high voltage region through a capacitive isolation barrier, where the high voltage region is structurally isolated from the low voltage region by an isolation structure. The isolation structure includes a junction termination structure, a deep trench structure, or a reduced surface field (RESURF) structure. The isolation structure forms an isolation ring substantially enclosing the high voltage region in the semiconductor substrate. The low voltage region is configured to provide a differential signal to the high voltage region through the capacitive isolation barrier. The high voltage region is configured to receive a differential signal from the low voltage region through the capacitive isolation barrier so as to level shift the differential signal.
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