SEMICONDUCTOR MEMORY DEIVCE AND ACCESSING METHOD THEREOF
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United States of America
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Sep 21, 2017
app pub date -
Aug 10, 2016
filing date -
Aug 10, 2016
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Abstract
The semiconductor memory device selectively switches at least two banks based on an input parallel address for writing or reading data, and includes a control unit, which controlled according to a following method: in a first data access, the semiconductor memory device is accessed according to the input parallel address; and then in a second data access and after, the semiconductor memory device is accessed according to a serial address different to the parallel address. Moreover, the semiconductor memory device is constructed by respectively connecting memory cells to intersections of word lines and bit lines, and the serial address contains: a 1st serial address for selecting one word line in the word lines, and a 2nd serial address for selecting one bit line in the bit lines.
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