Method of manufacturing a structure having one or several strained semiconducting zones that may for transistor channel regions

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United States of America Patent

PATENT NO 10665497
APP PUB NO 20170263495A1
SERIAL NO

15457447

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Abstract

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The method of manufacturing a structure comprising one or several strained semiconducting zones capable of forming one or several transistor channel regions, the method including the following steps:

    a) providing a substrate coated with a masking layer wherein there are one or several first slits exposing one or several first oblong semiconducting portions made of a first semiconducting material and extending in a first direction,b) making a second semiconducting material grow with a mesh parameter different from the mesh parameter of the first semiconducting material, so as to form one or several first semiconducting blocks strained along the first direction, on said one or several first oblong semiconducting portions.

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Patent Owner(s)

Patent OwnerAddress
STMICROELECTRONICS INC750 CANYON DRIVE SUITE 300 COPPELL TX 75019

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Augendre, Emmanuel Montbonnot, FR 35 621
Loubet, Nicolas Guilderland, US 245 2330
Maitrejean, Sylvain Grenoble, FR 24 116
Morin, Pierre Grenoble, FR 42 48

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