SEMICONDUCTOR MEMORY DEVICE
Number of patents in Portfolio can not be more than 2000
United States of America
Stats
-
N/A
Issued Date -
Sep 14, 2017
app pub date -
Sep 9, 2016
filing date -
Sep 9, 2016
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
According to one embodiment, a semiconductor memory device includes a first transistor which includes a first end coupled to a first node, a second end, and a gate coupled to the second end. A second transistor includes a third end coupled to the first node, a fourth end, and a gate coupled to the fourth end. A third transistor is provided between a first bit line and a second node in a first sense amplifier. A selector is configured to supply a gate of the third transistor with one of a potential of the second end and a potential of the fourth end.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully