MANUFACTURING METHOD OF NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
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United States of America Patent
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app pub date -
Aug 22, 2016
filing date -
Mar 2, 2016
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Abandoned
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Abstract
According to one embodiment, a conductive layer is patterned based on a first mask pattern to form word lines extending in a cell array region in a row direction, a slit is formed in the conductive layer in a peripheral region to form first air gaps between the word lines, a first insulation film is formed on the conductive layer to cover the slit, the conductive layer is patterned based on a second mask pattern to form select gate lines extending in the cell array region in the row direction, and the conductive layer in the peripheral region is divided in a column direction.
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