METHOD FOR MANUFACTURING WIRING SUBSTRATE AND WIRING SUBSTRATE MANUFACTURED THEREBY

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United States of America Patent

SERIAL NO

15511063

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Abstract

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Disclosed herein is a method for fabricating a wiring board in which a target substrate having via holes and/or trenches is subjected to an electroless plating process while being immersed in an electroless plating solution to fill the via holes and/or the trenches with a plating metal. The method includes the steps of: supplying the electroless plating solution to under the target substrate; diffusing an oxygen-containing gas into the electroless plating solution supplied under the target substrate; and allowing the electroless plating solution to overflow from over the target substrate.

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Patent Owner(s)

Patent OwnerAddress
C UYEMURA & CO LTD2-6 DOSHO-MACHI 3-CHOME CHUO-KU OSAKA-SHI OSAKA 541-0045

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
KAWASE, Tomohiro Osaka, JP 89 1012
TAKEUCHI, Masaharu Osaka, JP 20 435
YAMAMOTO, Hisamitsu Osaka, JP 26 61

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