SEMICONDUCTOR MEMORY DEVICE

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United States of America Patent

APP PUB NO 20170249994A1
SERIAL NO

15233691

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Abstract

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A semiconductor memory device includes a plurality of string units, including first and second string units in a first block, third and fourth string units in a second block, each of the string units including a plurality of serially connected memory cells between first and second select transistors, and first through fourth select gate lines. The first select gate line is commonly connected to gates of the first select transistors of the first and third string units. The second select gate line is commonly connected to gates of the first select transistors of the second and fourth string units. The third select gate line is commonly connected to gates of the second select transistors of the first and fourth string units. The fourth select gate line is commonly connected to gates of the second select transistors of the second string unit and another string unit.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBA1-1 SHIBAURA 1-CHOME MINATO-KU TOKYO 1050023 JAPAN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
HASHIMOTO, Toshifumi Fujisawa Kanagawa, JP 41 310

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Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges352177432312659221491211801 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +01002003004005006007008009001000110012001300140015001600170018001900

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