Efficient hardware trust verification in data communication systems that comprise network interface cards, central processing units, and data memory buffers
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United States of America Patent
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Jan 9, 2018
Grant Date -
Aug 17, 2017
app pub date -
May 2, 2017
filing date -
Sep 16, 2015
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Abstract
A data communication system comprises a Network Interface Card (NIC), Central Processing Unit (CPU), and Data Memory Buffer (DMB) to efficiently verify hardware-trust. The NIC, CPU, and DMB execute boot-up software, and in response, the NIC, CPU, and DMB execute hardware-trust software to assert control over their Application Programming Interfaces (APIs). The NIC, CPU, and DMB receive and hash hardware-trust data with their physically-embedded hardware-trust codes to generate hardware-trust results. The NIC, CPU, and DMB transfer their hardware-trust results for hardware-trust validation. The CPU may execute Network Function Virtualization Virtual Network Functions (NFV VNFs) for Software Defined Networks (SDNs).
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