NONVOLATILE RAM

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20170229162A1
SERIAL NO

15266393

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Abstract

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According to one embodiment, a nonvolatile RAM includes an interface block, a memory cell array block, and a signal line connecting the interface block and the memory cell array block. The interface block comprises a command processing portion. The memory cell array block comprises a memory cell array, an access circuit accessing the memory cell array, a read circuit reading read data from the memory cell array, a write circuit writing write data to the memory cell array, and a write control circuit controlling a read operation using the read circuit and a first write operation using the write circuit following the read operation without changing a selected word line in the memory cell array.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBA1-1 SHIBAURA 1-CHOME MINATO-KU TOKYO 1050023 ?1050023

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
FUJITA, Shinobu Tokyo, JP 110 1496
NOGUCHI, Hiroki Yokohama, JP 155 1361

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