NONVOLATILE RAM
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United States of America Patent
Stats
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N/A
Issued Date -
Aug 10, 2017
app pub date -
Sep 15, 2016
filing date -
Feb 9, 2016
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
According to one embodiment, a nonvolatile RAM includes an interface block, a memory cell array block, and a signal line connecting the interface block and the memory cell array block. The interface block comprises a command processing portion. The memory cell array block comprises a memory cell array, an access circuit accessing the memory cell array, a read circuit reading read data from the memory cell array, a write circuit writing write data to the memory cell array, and a write control circuit controlling a read operation using the read circuit and a first write operation using the write circuit following the read operation without changing a selected word line in the memory cell array.
First Claim
Other Claims data not available