Photopatternable Silicones For Wafer Level Z-Axis Thermal Interposer
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United States of America Patent
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Issued Date -
Jul 13, 2017
app pub date -
May 29, 2015
filing date -
Jun 19, 2014
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Abstract
Methods for fabrication of thermal interposers, using a low stress photopatternable silicone are provided, for use in production of electronic products that feed into packaging of LEDs, logic and memory devices and other such semiconductor products where thermal management is desired. A photopatternable silicone composition, thermally conductive material and a low melting point compliant solder form a complete semiconductor package module. The photopatternable silicone is applied on a surface of a wafer and selectively radiated to form openings which provided user defined bondline thickness control. The openings are then filled with high conductivity pastes to form high conductivity thermal links. A low melting point curable solder is then applied where the solder wets the silicone as well as the thermally conductive path that leads to low thermal contact resistance between the structured z-axis thermal interposer and the heat sink and/or substrate which can be a wafer or PCB.
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