STRUCTURE AND METHOD OF FAN-OUT STACKED PACKAGES

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United States of America Patent

SERIAL NO

15378898

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Abstract

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A fan-out stacked packages are formed by stacking a plurality of tiers followed by singulation process. Each tier comprises a plurality of units. Each unit comprises at least one chip, an encapsulation encapsulating the at least one chip, and a redistribution layer. The redistribution layer is electrically connected to the bond pads of the chip. A dielectric layer is formed on the redistribution layer. Adhesive pads are used to attach the plurality of tiers to each other. The redistribution layers of the units have a plurality of trace breakpoints electrically connected to each other using lateral traces formed on the sidewalls of the units.

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Patent Owner(s)

Patent OwnerAddress
POWERTECH TECHNOLOGY INCNO 10 DATONG RD HSINCHU INDUSTRIAL PARK HUKOU TOWNSHIP HSINCHU COUNTY

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
CHANG, Chia-Wei Hsinchu, TW 186 1465
FANG, Li-Chih Hsinchu, TW 33 241
LIN, Kuo-Ting Hsinchu, TW 11 42

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