HIGH VOLTAGE DMOS AND THE METHOD FOR FORMING THEREOF
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United States of America Patent
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Jun 15, 2017
app pub date -
Dec 15, 2015
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Dec 15, 2015
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A high voltage DMOS device using conventional silicon BCD (Bipolar CMOS DMOS) technology has a P-type buried layer and an N-type buried layer, a first epitaxial layer and a second epitaxial layer. The high voltage DMOS device is characterized in high breakdown voltage, good robustness and low Ron through controlling the thickness of the epitaxial layers, the dose and forming energy of the buried layers. In addition, the high voltage DMOS may further has a shallow drain region to further improve robustness.
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