Techniques for storing data and tags in different memory arrays
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United States of America Patent
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Oct 13, 2020
Grant Date -
Jun 15, 2017
app pub date -
Dec 22, 2016
filing date -
Nov 4, 2010
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Abstract
A memory controller includes logic circuitry to generate a first data address identifying a location in a first external memory array for storing first data, a first tag address identifying a location in a second external memory array for storing a first tag, a second data address identifying a location in the second external memory array for storing second data, and a second tag address identifying a location in the first external memory array for storing a second tag. The memory controller includes an interface that transfers the first data address and the first tag address for a first set of memory operations in the first and the second external memory arrays. The interface transfers the second data address and the second tag address for a second set of memory operations in the first and the second external memory arrays.
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