THIN FILM TRANSISTOR AND PREPARATION METHOD THEREOF, ARRAY SUBSTRATE, AND DISPLAY PANEL
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United States of America Patent
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app pub date -
Oct 9, 2015
filing date -
May 8, 2015
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Abstract
This disclosure provides a thin film transistor and the preparation method thereof, an array substrate, and a display panel, so as to solve the problem that the active layer is prone to be corroded when a metal oxide thin film transistor is produced by a back channel etching process. The preparation method comprises: forming a gate electrode metal thin film on a base substrate, and allowing the gate electrode metal thin film to form a gate electrode metal layer comprising a gate electrode by a patterning process; forming a gate electrode insulating layer on the gate electrode metal layer; forming an active layer on the gate electrode insulating layer; preparing a metal nanoparticle layer on the active layer, said metal nanoparticle layer being used as an etching protection layer; forming a source and drain electrode metal thin film on the base substrate on which the above processes are finished, and allowing the source and drain electrode metal thin film to form a source and drain electrode metal layer comprising a source electrode and a drain electrode by a patterning process, wherein the source electrode and the drain electrode cover a part of the metal nanoparticle layer; removing or oxidizing the part of the metal nanoparticle layer which is not covered by the source electrode and the drain electrode in an oxygen-containing atmosphere; and forming a passivation layer on the source and drain electrode metal layer.
First Claim
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Family
Country | kind | publication No. | Filing Date | Type | Sub-Type |
---|---|---|---|---|---|
CN | A | CN104934330 | May 08, 2015 | Patent | Application |
Type : Patent Sub-Type : Application | |||||
UNEXAMINED APPLICATION FOR A PATENT FOR INV. | Film transistor and preparation method thereof, array substrate and display panel | Sep 23, 2015 | |||
WO | A1 | WO2016179951 | Oct 09, 2015 | Patent | Application |
Type : Patent Sub-Type : Application | |||||
INTERNATIONAL APPLICATION PUBLISHED WITH INTERNATIONAL SEARCH REPORT | 一种薄膜晶体管及其制备方法、阵列基板和显示面板 | Nov 17, 2016 | |||
EP | B1 | EP3121840 | Oct 09, 2015 | Patent | Grant |
Type : Patent Sub-Type : Grant | |||||
Patent | THIN-FILM TRANSISTOR AND PREPARATION METHOD THEREFOR, ARRAY SUBSTRATE, AND DISPLAY PANEL | Aug 12, 2020 |
- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
BOE TECHNOLOGY GROUP CO LTD | NO 10 JIUXIANQIAO RD CHAOYANG DISTRICT BEIJING 100015 100015 | |
SOUTH CHINA UNIVERSITY OF TECHNOLOGY | NO 381 WUSHAN ROAD TIANHE DISTRICT GUANGZHOU GUANGDONG 510640 510640 |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Lan, Linfeng | Guangzhou, Guangdong, CN | 21 | 22 |
# of filed Patents : 21 Total Citations : 22 | |||
Peng, Junbiao | Guangzhou, Guangdong, CN | 26 | 28 |
# of filed Patents : 26 Total Citations : 28 | |||
Wang, Lei | Guangzhou, Guangdong, CN | 2386 | 21419 |
# of filed Patents : 2386 Total Citations : 21419 | |||
Xu, Xiaoguang | Beijing, CN | 23 | 48 |
# of filed Patents : 23 Total Citations : 48 | |||
Yan, Liangchen | Beijing, CN | 98 | 70 |
# of filed Patents : 98 Total Citations : 70 | |||
Yuan, Guangcai | Beijing, CN | 248 | 413 |
# of filed Patents : 248 Total Citations : 413 |
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Patent Citation Ranking
- 5 Citation Count
- H01L Class
- 18.50 % this patent is cited more than
- 8 Age
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11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Dec 1, 2028 |
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