ANTIFUSE-TYPE ONE TIME PROGRAMMING MEMORY CELL AND ARRAY STRUCTURE WITH SAME
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United States of America Patent
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Feb 3, 2017
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Aug 18, 2015
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Abstract
An antifuse-type one time programming memory cell, comprising: a first select transistor, wherein a first drain/source terminal of the first select transistor is connected with a bit line, and a gate terminal of the first select transistor is connected with a word line; an antifuse transistor, wherein a first drain/source terminal of the antifuse transistor is connected with a second drain/source terminal of the first select transistor, and a gate terminal of the antifuse transistor is connected with an antifuse control line; and a second select transistor, wherein a first drain/source terminal of the second select transistor is connected with a second drain/source terminal of the antifuse transistor, a gate terminal of the second select transistor is connected with the word line, and a second drain/source terminal of the second select transistor is connected with the bit line.
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