TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
N/A
app pub date -
Jan 19, 2017
filing date -
Nov 21, 2013
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
A transistor structure disposed on a substrate includes a gate electrode, an organic semiconductor layer, a gate insulation layer and a patterned metal layer. The gate insulation layer is disposed between the gate and the organic semiconductor layer. The patterned metal layer has a conductive oxidation surface and is divided into a source electrode and a drain electrode. A portion of the organic semiconductor layer is exposed between the source electrode and the drain electrode. The conductive oxidation surface directly contacts with the organic semiconductor layer.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully