Integration Of Metal Floating Gate In Non-Volatile Memory
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
N/A
app pub date -
Oct 14, 2016
filing date -
Nov 3, 2015
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
A non-volatile memory cell that includes a silicon substrate, source and drain regions formed in the silicon substrate (where a channel region of the substrate is defined between the source and drain regions), a metal floating gate disposed over and insulated from a first portion of the channel region, a metal control gate disposed over and insulated from the metal floating gate, a polysilicon erase gate disposed over and insulated from the source region, and a polysilicon word line gate disposed over and insulated from a second portion of the channel region.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully