INTER-CHIP CONNECTION FOR NOISE MITIGATION
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United States of America Patent
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May 4, 2017
app pub date -
Oct 30, 2015
filing date -
Oct 30, 2015
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Abstract
There is provided an inter-chip power connection in a multi-chip system, the inter-chip power connection including a transmission line connecting a first on-die power grid of a first die to a second on-die power grid of a second die, the first and second dies sharing a same first conductive layer supplying a power voltage of a power supply, wherein the transmission line is not directly connected to the first conductive layer.
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