High voltage transistor
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United States of America Patent
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Jan 2, 2018
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N/A
app pub date -
Sep 17, 2015
filing date -
Sep 17, 2015
priority date (Note) -
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Abstract
High voltage devices and methods for forming a high voltage device are disclosed. The high voltage device includes a substrate prepared with a device isolation region. The device isolation region defines a device region. The device region includes at least first and second source/drain regions and a gate region defined thereon. A device well is disposed in the device region. The device well encompasses the at least first and second source/drain regions. A primary gate and at least one secondary gate adjacent to the primary gate are disposed in the gate region. The at least first and second source/drain regions are displaced from first and second sides of the primary gate.
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