MANAGEMENT OF MEMORY REFRESH POWER CONSUMPTION

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United States of America Patent

SERIAL NO

15277730

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Abstract

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Embodiments include a system, an apparatus, a device, and a method. The apparatus includes a processor, a dynamic memory, and a hardware-implemented memory control circuit. The hardware-implemented control circuit includes a control circuit for establishing an extended refresh period of the dynamic memory based at least in part on a monitored result that indicates an occurrence of a memory loss in the dynamic memory. The hardware-implemented control circuit also includes a control circuit for causing a refresh of the dynamic memory during each of at least two extended refresh periods.

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Patent Owner(s)

Patent OwnerAddress
SEARETE LLC1756 - 114TH AVE S E # 110 BELLEVUE WA 98004

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Mangione-Smith, William Henry Kirkland, US 149 2001

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