Synchronising Devices Using Clock Signal Delay Estimation
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Mar 9, 2017
app pub date -
Sep 9, 2016
filing date -
Sep 9, 2015
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
A circuit for modifying a clock signal, the circuit comprising: a delay unit configured to receive the clock signal and delay the clock signal so as to output a plurality of delayed versions of the clock signal, each delayed version being delayed by a different amount of delay to the other delayed versions; a delay estimator configured to determine an amount of delay for modifying the clock signal; and a multiplexer configured to: receive each of the delayed versions of the clock signal; select a delayed version of the clock signal in dependence on the determined amount of delay; and output the selected version of the clock signal.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully