SHIFT REGISTER AND DRIVING METHOD THEREOF, GATE DRIVING DEVICE, DISPLAY PANEL
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United States of America Patent
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app pub date -
Jul 20, 2015
filing date -
Apr 21, 2015
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Abstract
The present invention provides a shift register and a driving method thereof, a gate driving device and a display panel, such that the shift register can pull down the output terminal by means of DC voltage signals, which reduces the duty cycle of the clock signal and thereby lowers the power consumption of Thin Film Transistors. The shift register comprises a plurality of cascaded shift register elements, each of which comprises: an input module in response to the input signal outputted by an input signal terminal, an output module in response to a voltage signal outputted a the pull-up node, a reset module in response to the reset signal outputted by a reset signal terminal, a first pull-down module in response to the input signal and the reset signal, and a second pull-down module in response to a voltage signal of a pull-down node.
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