Integrated circuit device body bias circuits and methods

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United States of America Patent

PATENT NO 9853019
SERIAL NO

15337876

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Abstract

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A system having an integrated circuit (IC) device can include a die formed on a semiconductor substrate and having a plurality of first wells formed therein, the first wells being doped to at least a first conductivity type; a global network configured to supply a first global body bias voltage to the first wells; and a first bias circuit corresponding to each first well and configured to generate a first local body bias for its well having a smaller setting voltage than the first global body bias voltage; wherein at least one of the first wells is coupled to a transistor having a strong body coefficient formed therein, which transistor may be a transistor having a highly doped region formed below a substantially undoped channel, the highly doped region having a dopant concentration greater than that the corresponding well.

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Patent Owner(s)

Patent OwnerAddress
MIE FUJITSU SEMICONDUCTOR LIMITED2000 MIZONO TADO-CHO KUWANA MIE 511-0118

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Clark, Lawrence T Phoenix, US 139 2030
Kidd, David A San Jose, US 27 290
Kuo, Augustine Berkeley, US 13 46

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