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Abstract

A memory channel command interface for one or more memory channels includes, for each memory channel, programmable storage for memory commands, a single channel processor for executing the memory commands, and a task engine for communicating output of the single channel processor to a memory medium. The memory commands may be organized into jobs including operations that include tasks. The tasks may be stored as part of operations in an operation memory, or may be stored in a task memory with pointers to the tasks being stored as part of operations in the operation memory. The memory channel command interface may further include a memory medium status storage that stores a priority indication for a memory command, based on a condition other than order of arrival or receipt of the memory command, and the single channel processor controls order of execution of memory commands based on the priority indication.

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First Claim