Access control and code scheduling

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 10891146
APP PUB NO 20170039085A1
SERIAL NO

15304302

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Abstract

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A data processing system operates in a plurality of modes including a first privilege mode and a second privilege mode with the first privilege mode giving rights of access that are not available in the second privilege mode. Application code executes in the second privilege mode and generates function calls to hypervisor code which executes in the first privilege mode. These function calls are to perform a secure function requiring the rights of access which are only available in the first privilege mode. Scheduling code which executes in the second privilege mode controls scheduling of both the application code and the hypervisor code. Memory protection circuitry operating with physical addresses serves to control access permissions required to access different regions within the memory address space using configuration data which is written by the hypervisor code. The hypervisor code temporarily grants access to different regions within the physical memory address space to the system in the second privilege mode as needed to support the execution of code scheduled by the scheduling code.

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Patent Owner(s)

Patent OwnerAddress
ARM IP LIMITED110 FULBOURN ROAD CAMBRIDGE CB1 9NJ

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Crosby, James Ely, GB 16 67
Meriac, Milosch Cambridge, GB 65 621
Vincent, Hugo John Martin Cambridge, GB 47 231

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