Assessment of a High Performance Computing Application in Relation to Network Latency Due to the Chosen Interconnects

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United States of America Patent

SERIAL NO

15262571

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Abstract

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A method and computer program product for testing a high performance computing application performing a computation within a clustered computer arrangement is disclosed. The high performance computing arrangement performances computations across processors in parallel wherein the processors cooperate to perform the computation. The application can be tested by adding delay and therefore latency to one or more commands inside of the precompiled application. The addition of delay can be used to simulate the performance of different interconnects that are used within the high performance computing arrangement.

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Patent Owner(s)

Patent OwnerAddress
SILICON GRAPHICS INTERNATIONAL CORP46600 LANDING PARKWAY FREMONT CA 94538-6420

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Baron, John E Burnsville, US 2 5
Thomas, Daniel Paris, FR 67 396

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