INTERFACE CIRCUIT FOR COMMUNICATION, AND SYSTEM INCLUDING THE SAME
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United States of America Patent
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Issued Date -
Jan 19, 2017
app pub date -
Sep 30, 2015
filing date -
Jul 13, 2015
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Abstract
A system may include a processor and a memory. The processor and the memory may communicate through a wire bus. The memory may include a receiver configured to generate phase symbols based on states of the wire bus, and a decoding block configured to generate data based on a number of phase symbols successively inputted.
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