PACKAGE-ON-PACKAGE ASSEMBLY AND METHOD FOR MANUFACTURING THE SAME
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United States of America Patent
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Issued Date -
Dec 15, 2016
app pub date -
Jun 9, 2015
filing date -
Jun 9, 2015
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Abstract
A package-on-package assembly includes a bottom die package and a top die package mounted on the bottom die package. The bottom die package includes an interposer having a first side and a second side opposite to the first side; at least one active chip mounted on the first side within a chip mounting area through a plurality of first bumps; at least one TSV chip mounted on the first side within a peripheral area being adjacent to the chip mounting area, wherein the TSV chip comprises at least one TSV connecter and is mounted on the first side through a plurality of second bumps arranged within the peripheral area; a molding compound disposed on the first side, the molding compound covering the at least one active chip and the at least one TSV chip; and a plurality of solder bumps mounted on the second side.
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