STRESS CONTROL FOR HETEROEPITAXY

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United States of America Patent

SERIAL NO

14729741

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Abstract

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Stress control using superlattice structures for epitaxy on base wafer substrates, including AlN/GaN superlattices for epitaxy of GaN on silicon {111} substrates. Crack-free GaN cap layers can be grown over superlattice structures containing AlN/GaN superlattice layers. Compressive and tensile stress can be precisely adjusted by changing the thickness of the superlattice layers and the number of superlattice layers. For a constant period thickness, growth conditions, such as growth rate of GaN, V/III ratio during AlN growth, and growth temperature, can be adjusted.

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Patent Owner(s)

Patent OwnerAddress
VEECO INSTRUMENTS INCTERMINAL DRIVE PLAINVIEW NY 11803

International Classification(s)

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  • 2015 Application Filing Year
  • H01L Class
  • 25498 Applications Filed
  • 22451 Patents Issued To-Date
  • 88.06 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances20152016201720182019202020212022202320240255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Krishnan, Balakrishnan Bridgewater, US 1 3
Lee, Soo Min Bridgewater, US 80 335
Papasouliotis, George Warren, US 12 175
Su, Jie Metuchen, US 136 2659

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  • 3 Citation Count
  • H01L Class
  • 13.47 % this patent is cited more than
  • 9 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges1792827316886303131891006776342711301 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +050010001500200025003000350040004500500055006000650070007500800085009000

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