METHOD FOR INCREASING STRESS IN THE CHANNEL REGION OF FIN FIELD EFFECT TRANSISTOR
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United States of America Patent
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Issued Date -
Dec 1, 2016
app pub date -
Jun 30, 2015
filing date -
May 25, 2015
priority date (Note) -
Abandoned
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Abstract
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a gate structure on the substrate; forming an interlayer dielectric (ILD) layer around the gate structure; removing the gate structure to form a recess; forming a stress layer in the recess, wherein the stress layer comprises metal; and forming a work function layer on the stress layer.
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