Systems and methods of phase frequency detection with clock edge overriding reset, extending detection range, improvement of cycle slipping and/or other features
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United States of America Patent
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Dec 26, 2017
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app pub date -
May 19, 2016
filing date -
Mar 15, 2013
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Abstract
Systems and methods associated with phase frequency detection are disclosed. In one illustrative implementation, a phase frequency detection (PFD) circuit device may comprise first circuitry and second circuitry having a set input, a reset input, and an output, wherein the set input has a higher priority than the reset input, and additional circuitry arranged and operatively coupled to provide advantageous operation of the PFD circuit device. According to some implementations, for example, systems and methods with clock edge overriding reset features, extended detection range(s), and/or reduction of reverse charge after cycle slipping are provided.
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