Design Tools For Converting a FinFet Circuit into a Circuit Including Nanowires and 2D Material Strips
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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N/A
Issued Date -
N/A
app pub date -
Jul 28, 2016
filing date -
Jun 23, 2014
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
An integrated circuit design tool includes a cell library. An entry in the cell library comprises a specification of the cell including a first transistor and a second transistor. The first transistor can include a first set of nanowires or 2D material strips arranged in parallel to form a channel structure, and a gate conductor disposed across the first set of nanowires or 2D material strips. The second transistor can include a second set of nanowires or 2D material strips arranged in parallel to form a channel structure, and a gate conductor disposed across the first set of nanowires or 2D material strips. The number of nanowires or 2D material strips in the first set can be different from the number of nanowires or 2D material strips in the second set, so that the drive power of the individual transistors can be set with finer granularity.
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
SYNOPSYS INC | 675 ALMANOR AVENUE SUNNYVALE CA 94085 |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Kawa, Jamil | Campbell, US | 73 | 1110 |
# of filed Patents : 73 Total Citations : 1110 | |||
Moroz, Victor | Saratoga, US | 168 | 4409 |
# of filed Patents : 168 Total Citations : 4409 |
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- 4 Citation Count
- G06F Class
- 11.69 % this patent is cited more than
- 9 Age
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11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | May 17, 2028 |
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