Efficient transport flow processing on an accelerator
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United States of America Patent
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Jul 14, 2020
Grant Date -
Nov 10, 2016
app pub date -
May 4, 2016
filing date -
May 7, 2015
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Abstract
Data processing apparatus includes a host processor and a network interface controller (NIC), which is configured to couple the host processor to a packet data network. A memory holds a flow state table containing context information with respect to computational operations to be performed on multiple packet flows conveyed between the host processor and the network. Acceleration logic is coupled to perform the computational operations on payloads of packets in the multiple packet flows using the context information in the flow state table.
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