MOSFET with reduced resistance
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United States of America Patent
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Jul 7, 2020
Grant Date -
Oct 20, 2016
app pub date -
Dec 28, 2015
filing date -
Apr 20, 2015
priority date (Note) -
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Abstract
A semiconductor device includes a semiconductor substrate including a doped region. A metal layer is formed on the doped region. An insulating layer covers the metal layer. The metal layer can serve as a buried metal layer which reduces electrical resistance between electrical charge in the doped region and adjacent contacts. The contacts can extend through the insulating layer between the buried metal layer and overlying metal stripes.
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