MULTIPLE BIT LINE VOLTAGE SENSING FOR NON-VOLATILE MEMORY
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United States of America Patent
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Issued Date -
Oct 13, 2016
app pub date -
Aug 4, 2015
filing date -
Apr 8, 2015
priority date (Note) -
Abandoned
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Abstract
A non-volatile memory system comprises a plurality of memory cells arranged in a three dimensional structure and one or more control circuits in communication with the memory cells. The one or more control circuits are configured to program and verify programming for the memory cells. The one or more control circuits are configured to apply a reference voltage to the memory cells. While applying the reference voltage to the plurality of memory cells, the one or more control circuits are configured to sense whether different memory cells of the plurality of memory cells are in different data states by applying different bit line voltages to different bit lines connected to the different memory cells.
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