SEMICONDUCTOR DEVICE HAVING BURIED WORDLINES
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United States of America Patent
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Issued Date -
Sep 29, 2016
app pub date -
Mar 25, 2015
filing date -
Mar 25, 2015
priority date (Note) -
Abandoned
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Abstract
A memory device includes a substrate having thereon a plurality of active areas that are isolated from one another by a shallow trench isolation (STI) region. A plurality of digitlines is arranged along a first direction on the substrate. A plurality of buried wordlines is arranged in wordline trenches in the substrate along a second direction that is orthogonal to the first direction. A plurality of thicker portions and thinner portions are alternately and repeatedly arranged in each of the wordline trenches to thereby constitute each of the buried wordlines. Each of the thinner portions is arranged between two ends of adjacent two of the active areas.
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