SEMICONDUCTOR DEVICE MANUFACTURING METHOD
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United States of America Patent
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Issued Date -
Sep 29, 2016
app pub date -
Mar 3, 2016
filing date -
Mar 27, 2015
priority date (Note) -
Abandoned
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Abstract
A semiconductor device manufacturing method which enhances the reliability of the semiconductor device. The method uses a lead frame (hoop) which includes a first suspension lead and a second suspension lead. Each of the suspension leads has a narrow part which has a smaller width than at least any one of a first lead, a second lead, and a tie bar. If a tensile stress is applied to the first suspension lead or second suspension lead, the narrow parts reduce the stress. This relieves the stress on the first lead, the second lead and the base of a sealing member, thereby reducing the possibility of package cracking or package chipping. As a result, the reliability of the semiconductor device is enhanced.
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